1. Field of the Invention
The present invention relates to a semiconductor device, and in particular to a high voltage IC (hereinafter referred to as an “HVIC”).
2. Description of the Background Art
Conventionally, there are techniques proposed for implementing HVICs using the RESURF (reduced surface field) effect. For example in the technique described in Japanese Patent Application Laid-Open No. 9-283716 (1997), the RESURF effect is used to achieve high breakdown voltage of a level shifting circuit which converts signal levels from low potential to high potential.
More about the RESURF effect is described in, for example, U.S. Pat. No. 4,292,642, and some HVICs are disclosed in Japanese Patent Application Laid-Open Nos. 9-55498 (1997) and 2-248078 (1990). Further, Japanese Patent Application Laid-Open No. 5-190693 (1993) discloses a technique for forming, in multiple layers, field plates which are isolated from the surroundings so that the electric field at the surface of a semiconductor substrate can be stabilized by capacitive coupling between the field plates.
Since in the conventional HVICs, interconnect lines applied with a high potential of several hundred volts are located above a semiconductor substrate, there is a possibility of local electric field concentration occurring due to the influence of potentials of those interconnect lines, which can cause a decrease in breakdown voltage of a semiconductor device. Thus, it can be difficult to achieve a semiconductor device with desired breakdown voltage.
Further, an epitaxial layer, which is commonly used for improvement in breakdown voltage by using the RESURF effect, can easily vary in impurity concentration and thickness and thus has difficulty in satisfying the RESURF condition. From this also, it can be difficult to achieve a semiconductor device with desired breakdown voltage.